High speed SERDES (SERializer/DESerializer) elements are key to modern high performance digital communication systems and to major digital interfaces in computer systems. The nature of electronics makes electrical signals the most fundamental, giving them an advantage over other signal forms, such as optical, which need to be converted to and from the electrical form with significant penalties in cost, power, and complexity. In most cases optical signaling is viable when long distances are involved and there is little practical alternative to electrical signals for internal communication within localized electronic systems.
Other than for very low clock and data rates or very short connections, signal conductors must be driven by and terminated in their characteristic impedance to avoid signal reflections causing unacceptable signal integrity. Material properties and conductor dimensions result in the characteristic signal impedance of such conductors being centered on a value of about 50 ohms, or 100 ohms differentially. This means signal transmission power would be quite high if the intrinsic signal rates and swings of the electronic circuits were widely used in a large system. EMI and mutual coupling between signals would also become difficult to manage. It is advantageous for noise, power, and system complexity to include SERDES devices to significantly reduce the number of long-range signals by increasing bit rate to a more nearly optimum value and at the same time to reduce signal amplitude to a more nearly optimum value.
To compensate for distortion in the signal conductors for further enhanced transmission range and rate, SERDES also typically add pre-emphasis to the transmitted signal and perform equalization on the received signal. To allow the same high-speed signal to carry both data and clock information, the transmitter encodes the signal and the receiver performs clock recovery and data decoding.
In recent years emphasis has been placed on blind adaptive equalization for high speed SERDES. A few methods have been proposed to adapt the transmitter finite impulse response (FIR) filter. As these methods rely on back-channels or coding overheads (discussed further herein) to exchange information between the far end receiver and the transmitter, the solutions are facing some resistance in the industry due to the extra complexity involved. Another known method, based on estimation of the loss of the channel, does not provide adaptation when inter-symbol interference is caused by signal reflections.
It is known in SERDES implementations to utilize a symmetrical link. In a symmetrical implementation, both SERDES, one at each end of the link, share the burden of equalizing the link. Thus, each included SERDES features similar equalization and monitoring schemes, and the performance and architecture at each end of the link is typically the same. Likewise, power consumption at either end of the link is the same.
It is proposed herein to use an asymmetrical link. However with such an asymmetrical link, the two implicated SERDES are not functionally or operationally the same. A first SERDES would be provided with more functionality and operability than a second SERDES at the other end of the link, so it will be understood that the first SERDES has primary responsibility for equalizing the link. In this configuration, the second SERDES applies minimal or no equalization to the two branches (directions) of the link. The first SERDES includes an adaptive finite impulse response (FIR) filter for transmit, and equalization of the transmit branch to the second SERDES is implemented through tuning of the FIR filter (by coefficient adaptation, for example). With respect to the receive branch of the link, the first SERDES utilizes a decision feedback equalizer (DFE) and analog filter for equalization, and equalization of the receive branch to the first SERDES is implemented through tuning of the DFE and linear analog equalizer coefficients. Since the first and second SERDES have quite distinct performance and operational characteristics, and further because about one-half of the power consumed in a SERDES is consumed by the included channel equalization circuitry (DFE and FIR), it is not surprising that power consumption at the first SERDES far exceeds that of the second SERDES.
Reference is now made to FIG. 1 which shows a block diagram of a SERDES-based communication system implementing an asymmetrical link concept. The first SERDES 10 includes a transmitter (TX) 12 connected to a first branch 14 of the asymmetrical link 16. This transmitter 12 includes a finite impulse response (FIR) filter 18 whose coefficients 20 can be adapted (or tuned) in order to supply pre-emphasis and thus equalization to the transmit first branch 14 of the link 16. The second SERDES 30 includes a receiver (RX) 32 connected to the first branch 14 of the asymmetrical link 16, and a transmitter 34 connected to a second branch 22 of the asymmetrical link 16. The receiver 32 and transmitter 34 will typically include little or no equalization functionality, and thus rely on the abilities of the first SERDES to equalize communications over the first and second branches 14 and 22. The first SERDES 10 further includes a receiver 24 connected to the second branch 22 of the asymmetrical link 16. The receiver 24 includes a decision feedback equalizer (DFE) 26 and an analog equalizer (not shown). The operational coefficients 20 of at least the decision feedback equalizer 26, and perhaps also the analog filter, can be adapted (or tuned) in order to compensate and thus equalize the second branch 22 of the link 16.
It is important to recognize that operation and tuning of the decision feedback equalizer 26 and analog filter to provide the desired equalization is known in the art and, relatively speaking, quite easy to accomplish since all the information needed to drive the tuning operation can be obtained by the receiver 24 in the first SERDES 10 from processing the signal which is received over the second branch 22 of the asymmetrical link 16. Tuning of the finite impulse response filter 18, however, presents a more difficult challenge because the information needed to drive the tuning operation is present at the receiver 32 of the second SERDES 30, and thus must be communicated back to the first SERDES 10 in some manner for subsequent processing and determination of first branch 14 equalization parameters.
One known solution to the foregoing difficult challenge is to equip the second SERDES 30 with an eye scanning functionality 40 which monitors the signal received by the receiver 32 and calculates characteristics of the received eye opening. This eye opening information is then communicated back to the first SERDES 10 over the first branch 14 (in a reverse direction) using a near-DC or common mode signaling backchannel 42. The first SERDES 10 receives this reverse-communicated eye opening information, processes the information and then adapts (or tunes) the coefficients 20 of the finite impulse response filter 18 in order to supply pre-emphasis and thus equalization to the link so as to improve the quality and character of the eye opening at the receiver 32. Concerns with this prior art solution include: a) a standard must be defined to regulate the existence and use of the backchannel 42; b) extra circuitry must be included in both SERDES 10 and 30 to support the backchannel; and c) both implicated SERDES devices must know of and support the solution.
Another known solution again equips the second SERDES 30 with an eye scanning functionality 40 which monitors the signal received by the receiver 32 and calculates characteristics of the received eye opening. Instead of using the backchannel 42, however, this solution instead adds an overhead channel 44 to the data communications from transmitter 34 to receiver 24 over the second branch 22 of the asymmetrical link 16. The eye opening information is thus communicated back to the first SERDES 10 using the overhead channel 44. The first SERDES 10 receives this eye opening information via receiver 24, processes the information and then adapts (or tunes) the coefficients 20 of the finite impulse response filter 18 in order to supply pre-emphasis and thus equalization to the link so as to improve the quality and character of the eye opening at the receiver 32. Concerns with this prior art solution include: a) a standard must be defined to regulate the existence and use of the overhead channel 44; and b) both SERDES must know of and support the solution.
It will thus be noted that a significant disadvantage of these prior art solutions is that both ends of the link 16 need to be connected to a SERDES with compatible autonegotiation functionality. As a consequence, it may be mandatory for a user to select SERDES devices from a common vendor for installation on both ends of the link 16. There may also exist concerns over power consumption at both ends of the link. Thus, neither of the known prior art solutions discussed above appears to be well suited for use in an asymmetrical link environment.
There exists a need in the art to provide an efficient adaptation mechanism for the transmitter finite impulse response filter coefficients which: would not require a standardized, or standard body approved, solution; would support use of different vendor SERDES devices at the opposed ends of the communications link; and would enable use of an asymmetric link.